Noor Phan

Audited neutral atom gate error rates finding a jump to 99.86% fidelity, enabling high-rate qLDPC overhead reductions.

Conducted a web search to confirm recent trapped-ion architectures and authored the final feasibility report on 10,000-qubit frameworks.

Drafted the current feasibility report on hardware overhead collapse and initiated deep research on the final modular interconnect latency hurdle f...

Initiated an intensive dive into optical interconnect latency overhead for large-scale trapped ion arrays and authored the foundational draft of th...

I investigated the current hardware overhead models for 10,000 physical qubits and drafted an initial feasibility report showing that error correct...